Among nonvolatile memories, a MRAM (Magnetoresistive Random Access Memory) making use of a magneto-resistance change has the potential for becoming a RAM capable of a high-speed operation, and rewriting an unlimited number of times from a practical point of view. The basic element of the MRAM is called a MTJ (Magnetic Tunnel Junction) of a structure incorporating an insulation layer sandwiched between two ferromagnetic layers, the insulation layer serving as a tunneling barrier. Information is recorded by taking advantage of a tunnel magneto-resistance TMR (Tunnel Magneto-Resistance) effect whereby an element resistance largely differs according to parallel or anti-parallel in orientation of respective magnetizations of these two ferromagnetic layers.
A memory cell configuration among MRAMs with a scheme of rewriting magnetization orientation by injection of electrons having two-way of spin polarizations due to magnetization of the ferromagnetic layers, spin-injection magnetization-reversal type, is shown in a circuit diagram of FIG. 43 (a), and a sectional schematic diagram of FIG. 43 (b), respectively. A memory using this scheme is hereinafter referred to as an SPRAM (Spin-transfer torque Random Access Memory). This memory cell is comprised of one piece each of tunneling magneto-resistance element TMR, selection transistor MCT for reading, word line WL, bit line BL, and source line SL. The tunnel magneto-resistance element TMR includes at least two magnetic layers, one thereof being made up of a fixed layer PL where a spin orientation is fixed, while the other thereof being made up of a free layer FL where a spin orientation assumes either of two states, including an anti-parallel state {FIG. 44 (a)}against the fixed layer, and a parallel state {FIG. 44 (b)}against the fixed layer, as shown in FIG. 44. A tunnel barrier film TB is present between these films. For the tunnel barrier film TB, use is made of MgO, and so forth.
Information is stored by a resistance value that is dependent on a spin orientation in the free layer FL. Electrical resistance of the tunnel magneto-resistance element is turned into a high resistance state when the free layer FL is in the anti-parallel state, and turned into a low resistance state when the free layer FL is in the parallel state. In a read operation, large and small, in magnitude of the resistance of the tunnel magneto-resistance element TMR, are read out. On the other hand, in a write operation, a spin-injection magnetization reversal technology is used whereby a current is caused to vertically flow to a TMR, thereby varying the spin orientation in the free layer FL according to the direction of the current. In a memory chip, writing is executed by causing a current to flow either from a bit line BL to a source line SL, or from the source line SL to the bit line BL. Because a current necessary for writing is proportional in magnitude to a size of the tunnel magneto-resistance element TMR, miniaturization together with reduction in rewrite current can be achieved. That is, the SPRAM has an excellent characteristic in terms of scalability. These are described in detail in “2005 International Electron Device Meeting Technical Digest Papers pp. 459-462 (Nonpatent Document 1), and “ISSCC 2007 Digest of Technical Papers pp. 480-481 (Nonpatent Document 2).
Further, FIG. 45 schematically shows another example of a TMR element. In the figure, a free layer is of a stacked structure unlike the case shown in FIG. 44. More specifically, the TMR element is structured such that a non-magnetic material layer MB is sandwiched between magnetic material layers that are mutually anti-parallel to each other, and these layers are integrated to serve as a free layer FL. The stacked structure may include more layers. By doing so, a memory element comprised of a TMR element whose state is stable against disturbance caused by heat can be obtained. FIG. 46 schematically shows still another example of a TMR element. In this example, unlike the case shown in FIG. 44, magnetizations in a free layer FL, and a fixed layer PL, respectively, are not oriented in the horizontal direction, but are oriented in a direction vertical to a tunnel barrier film TB. Selection of such material as described will render it possible to obtain a memory element comprised of a TMR element whose two states (parallel and anti-parallel) are stable against disturbance caused by heat. This memory element has a feature that stability in memory cell operation in a wide temperature range can be realized even after progress in scaling.
Meanwhile, multi-valued storage capable of storing a plural information in one memory cell with the use of the tunnel magneto-resistance element TMR has been under studies. In Japanese Unexamined Patent Application Publication No. 2003-78114 (Patent document 1), there is described a magnetic memory capable of realizing multi-values by connecting a plurality of TMR elements in series. Further, in Japanese Unexamined Patent Application Publication No. 2007-281334 (Patent document 2), and Japanese Unexamined Patent Application Publication No. 243933/2008 (Patent document 3), there is described a magnetic memory where plural pieces of TMR elements are arranged in parallel by use of a spin-injection magnetization-reversal element to be thereby used as a memory element of a memory cell,